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[Other resource] 电梯控制电路

Description: 电梯控制电路，用verilog写-elevator control circuit used to write Verilog
Platform: | Size: 2249 | Author: 杨艳 | Hits:

[Other] dianti

Description: 一个VERILOG编的电梯模拟程序，有一点小问题，要的话去修改一下。-The elevator made a Verilog simulation program, it is a small problem, it is necessary to so to make some corrections.
Platform: | Size: 2048 | Author: 王 | Hits:

[Other systems] dianti

Description: 基于Verilog的八层电梯设计，能够实现自动化的电梯控制。-Verilog based on the eight-lift designed to automate the elevator control.
Platform: | Size: 2048 | Author: xiaoyong | Hits:

[VHDL-FPGA-Verilog] diantikongzhiqi

Description: 基于Verilog的八层电梯设计，能够实现自动化的电梯控制。-Verilog based on the eight-lift designed to automate the elevator control.
Platform: | Size: 122880 | Author: xiaohao | Hits:

[VHDL-FPGA-Verilog] dianti

Description: 基于verilog的智能电梯代码，能实现6层电梯的运行-Verilog-based intelligent elevator code, can achieve 6-storey elevator running
Platform: | Size: 74752 | Author: 陈培 | Hits:

[VHDL-FPGA-Verilog] verilogforelevater

Description: 本代码主要用于实现利用verilog编码八层电梯的自动控制。利于初学者学习参考-This code is primarily used to implement the use of automatic control verilog coding eight-story elevator. Reference to help beginners learn
Platform: | Size: 35840 | Author: | Hits:

[VHDL-FPGA-Verilog] NewFolder

Description: these are the codes written in verilog which are for a dual elevator design
Platform: | Size: 6144 | Author: soumya | Hits:

[VHDL-FPGA-Verilog] dianti

Description: 实现电梯的VERILOG 源程序，完成实现，有仿真波形-VERILOG source code to achieve the elevator to complete the implementation, a simulation waveform
Platform: | Size: 1285120 | Author: 杨希 | Hits:

[VHDL-FPGA-Verilog] lift

Description: 简易电梯的设计与实现，包含用Verilog语言的编写，电梯的结构和工作原理-Simple elevator design and implementation, including the preparation with the Verilog language, structure and working principle of the lift
Platform: | Size: 310272 | Author: 陈凯 | Hits:

[VHDL-FPGA-Verilog] elev

Description: 电梯verilog代码，6层楼的，里面有电路图也有芯片类型-code of elevator verilog
Platform: | Size: 76800 | Author: demon | Hits:

[VHDL-FPGA-Verilog] lift_control

Description: 用verilog语言编写的一个100层电梯控制系统。-Verilog language with a 100 floor elevator control system.
Platform: | Size: 4096 | Author: 刘俊斌 | Hits:

[VHDL-FPGA-Verilog] lift_verilog

Description: 用verilog实现的电梯控制器，代码中有详细的注释说明，是学习rtl设计很好的资料-The elevator controller using verilog implementation, the code has detailed notes, is good datum to learn rtl design
Platform: | Size: 11264 | Author: | Hits:

[VHDL-FPGA-Verilog] Verilog_zhinengdianti

Description: 很好的完善verilog代码，使用于智能电梯嵌入式开发和de2开发板爱好者-Very good perfect verilog code, used in intelligent elevator embedded development and de2 development board lovers
Platform: | Size: 208896 | Author: 阿桑德拉 | Hits:

[VHDL-FPGA-Verilog] 3dianti

Description: 用Verilog实现模拟三层电梯控制，包括上行、下行、停止、开关门等效果。-Using Verilog to realize simulation of three layer elevator control, including the uplink, downlink, stop, switch door effect.
Platform: | Size: 2822144 | Author: 色素 | Hits:

[VHDL-FPGA-Verilog] shejilegeshangxiazidongkongzhi

Description: Verilog 的设计的程序。反复看了很久，电梯设计很是实用性强的一个程序，现在分享给大家，很多实验室做设计的时候需要，希望可以用到-The Verilog design program. Repeatedly looked for a long time, elevator design is very practical program for everyone now share many laboratory design needs can be used
Platform: | Size: 1024 | Author: wuliang | Hits:

[VHDL-FPGA-Verilog] dianti

Description: 电梯程序 用verilog实现 经过quartus验证-Elevator after quartus verification procedures with verilog
Platform: | Size: 342016 | Author: nilsolov | Hits:

[VHDL-FPGA-Verilog] LAB-15

Description: FPGA实现对电梯的设计，verilog实现的。-FPGA implementation of the design of the elevator, verilog achieved.
Platform: | Size: 516096 | Author: 李娟 | Hits:

[VHDL-FPGA-Verilog] elevator_v2

Description: 用verilog语言描述的模拟单电梯的运行过程。方向优先原则。(1)每层电梯入口处设有上下请求按钮（一楼只有上请求，6楼只有下请求），电梯内设有顾客到达层次的停站请求开关。 (2)电梯入口处设有电梯当前所处楼层指示装置及电梯运行模式(上升或下降)指示装置。 (3)电梯每2秒升(降)一层楼。 (4)电梯到达有停站请求的楼层，经过1秒电梯门打开，开门指示灯亮，开门3秒后，电梯进入关门中状态，提示乘客可以按下延迟关门按键，此时指示灯闪烁，2秒后电梯门关闭，电梯继续进行，直至执行完最后一个请求信号后停留在当前层。 (5)能记忆电梯内外所有请求，并按照电梯运行规则按顺序响应，每个请求信号保留至执行后消除。 (6)电梯运行规则（方向优先电梯调度算法）：当电梯处于上升模式时，只响应比电梯所在位置高的上楼请求信号，由下而上逐个执行，直到最后一个上楼请求执行完毕；如果高层有下楼请求，则直接升到由下楼请求的最高层，然后进入下降模式。当电梯处于下降模式时则与上升模式相反。 (7)电梯初始状态为一楼等待状态。 -Simulation with verilog language to describe the operation of a single lift process. Direction priority principle. (A) each elevator entrance and down a request button (on the first floor only on request, 6th floor only under request), equipped with elevators to reach levels of customer request switch stops. (2) Lift the floor where the entrance to lift the current operating mode indicating device and lift (rising or falling) indicating devices. (3) Lift up every two seconds (lower) floor. (4) There are stops the elevator reaches the floor of the request, after one second the elevator doors opened, door lights, open the door three seconds later, the elevator into the closed state, suggesting that delayed passengers can press the button to close the door, then the indicator flashes, 2 seconds after the elevator doors closed, the elevator continues until the last request signal is executed after the stay in the current layer.   (5) can memorize all requests outside the elevator
Platform: | Size: 3192832 | Author: 饶全成 | Hits:

[VHDL-FPGA-Verilog] lift

Description: 用Verilog语言和实验箱上的按键和灯，实现三层电梯简单的上下楼和开关门。-With buttons and lights Verilog language and experimental box, simple to implement Layer elevator downstairs and switch on the door.
Platform: | Size: 1024 | Author: 李占阳 | Hits:

[VHDL-FPGA-Verilog] elevator_controller

Description: 采用verilog写的四层电梯控制程序，有相应的图片，报告，容易理解-Elevator controller program of four floors use the Verilog, and it includes paper and picture,and it is very easy understand.
Platform: | Size: 1277952 | Author: maogang | Hits:
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